So sánh kiến trúc bus Wishbone và Amba Axi

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Tác giả: Ngô Lâm Nguyễn, Quang Anh Tuấn Nguyễn, Văn Tuấn Nguyễn, Quang Phúc Trương, Bá Huy Văn, Phan Mẫn Đạt Võ

Ngôn ngữ: vie

Ký hiệu phân loại: 004.64 Kinds of hardware

Thông tin xuất bản: Tạp chí Khoa học Giáo dục Kỹ thuật - Trường Đại học Sư phạm Kỹ thuật TP. Hồ Chí Minh, 2022

Mô tả vật lý: 94-104

Bộ sưu tập: Metadata

ID: 499498

Thêm vào giỏ

In the current trend of The Fourth Industrial Revolution, System-on-chip (SoC) design plays an important role in embedded systems and is a leading field of many industrial countries around the world. The rapid development of semiconductor technology makes it possible to integrate more and more components on a chip. Bus protocols were developed and used as a common interface for efficient interconnection of on-chip components, reducing complexity, energy consumption, and manufacturing costs. In this paper, we compare two popular bus architectures WISHBONE and AMBA AXI (Advanced Microcontroller Bus Architecture Advanced eXtensible Interface) based on the point-to-point connection system model by performing simulation and comparing their performance based on resource parameters, power consumption of each system. Specifically, the Point-to-Point connection model of both buses will use a MASTER interface which is a DMA (Direct Memory Access) connected to a SLAVE interface which is a RAM (Random Access Memory). These interfaces are IP cores that can be used and reused for different applications and purposes. The results are verified through simulation with the software Xilinx Vivado 2019.1.Trong xu hướng hiện tại của cuộc Cách mạng Công nghiệp 4.0, thiết kế Hệ thống trên chip (SoC) đóng vai trò quan trọng trong các hệ thống nhúng và là một lĩnh vực mũi nhọn của nhiều nước công nghiệp trên thế giới. Sự phát triển nhanh chóng của lĩnh vực công nghệ bán dẫn giúp chúng ta có thể tích hợp ngày càng nhiều các thành phần trên một con chip. Các giao thức bus được phát triển và sử dụng như một giao diện chung cho việc kết nối hiệu quả giữa các thành phần trên chip, giúp giảm mức độ phức tạp, năng lượng tiêu thụ và chi phí sản xuất. Trong bài báo này, nhóm tác giả so sánh hai loại kiến trúc bus phổ biến là bus WISHBONE và AMBA AXI (Advanced Microcontroller Bus Architecture Advanced eXtensible Interface) dựa trên mô hình hệ thống kết nối điểm - điểm bằng cách thực hiện mô phỏng và so sánh hiệu năng của chúng dựa trên thông số tài nguyên, công suất tiêu thụ của mỗi hệ thống. Cụ thể, mô hình kết nối điểm - điểm của cả hai bus sẽ sử dụng một giao diện MASTER là một DMA (Direct Memory Access) kết nối với một giao diện SLAVE là một bộ nhớ RAM (Random Access Memory). Các giao diện này là các lõi IP có thể được sử dụng và tái sử dụng cho các ứng dụng và mục đích khác nhau. Kết quả được thực nghiệm thông qua mô phỏng với phần mềm Xilinx Vivado 2019.1.

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