We propose an FPGA-based Time-to-Digital Converter (TDC) that utilizes a Virtual Bin (VB) approach with opposite-transition (OT) inputs on two Tapped-Delay Lines (TDLs) to obtain less-correlated time bins. The VBs from the proposed OT TDC were obtained by comparing and segmenting the less-correlated bins collected from the two TDLs. The OT TDC was implemented on a 7-series FPGA (Xilinx) to verify performance. A conventional monotonic-transition (MT) TDC, which used identical transition inputs (0-to-1 or 1-to-0 transition) for the two TDLs, was also implemented as a control group. The results were compared with those from the MT TDC and other studies. The proposed method effectively improves time resolution and integral linearity while keeping resource usage low by exploiting these characteristics. The average bin size and RMS value were 5.5 and 4.2 ps, respectively. Moreover, the proposed method exhibits stable performance under temperature variations and implementation location changes. The VB OT TDC, which applies the VB method to the OT TDC, successfully measures detection time differences of two signals from two Cerenkov radiator integrated microchannel plate photomultiplier tubes (CRI-MCP-PMTs) with a high timing precision of sub-100 ps. The VB OT TDC can be used for next-generation applications that require fast-timing measurements.