Chip rate estimation for direct-sequence spread spectrum (DSSS) signals plays a crucial role in signal detection and interference identification in non-cooperative wireless communication systems. However, accurate chip rate estimation is difficult in low signal-to-noise ratio (SNR) environments due to the influence of noise and channel fading. To address this problem, an improved chip rate estimation method, based on a time-reassigned multisynchrosqueezing transform energy squeeze, for DSSS signals is proposed for low SNR conditions. In this method, we explain how to choose an appropriate wavelet function and concentrate the wavelet coefficients on the energy ridge by reordering time details. This enhances the time resolution of the signal energy, reduces noise interference, and improves the accuracy of chip rate estimation for DSSS signals. To validate the proposed method, we compared the effects of different information code lengths, spread spectrum code lengths, spread spectrum code sequences, and modulation schemes on chip rate estimation performance with traditional methods. Additionally, we applied the method to real DSSS signal data to demonstrate its feasibility. Simulation examples and measurements demonstrate the reliability of the proposed method in low SNR environments.